CITS Sniffer v2: ESP-IDF 5.5 Projektstruktur mit CMakeLists, sdkconfig, partitions_8M
This commit is contained in:
Clawdia
@@ -0,0 +1,50 @@
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# Install script for directory: /home/claw/esp/esp-idf/components/esp_system
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# Set the install prefix
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if(NOT DEFINED CMAKE_INSTALL_PREFIX)
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set(CMAKE_INSTALL_PREFIX "/usr/local")
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endif()
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string(REGEX REPLACE "/$" "" CMAKE_INSTALL_PREFIX "${CMAKE_INSTALL_PREFIX}")
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# Set the install configuration name.
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if(NOT DEFINED CMAKE_INSTALL_CONFIG_NAME)
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if(BUILD_TYPE)
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string(REGEX REPLACE "^[^A-Za-z0-9_]+" ""
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CMAKE_INSTALL_CONFIG_NAME "${BUILD_TYPE}")
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else()
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set(CMAKE_INSTALL_CONFIG_NAME "")
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endif()
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message(STATUS "Install configuration: \"${CMAKE_INSTALL_CONFIG_NAME}\"")
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endif()
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# Set the component getting installed.
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if(NOT CMAKE_INSTALL_COMPONENT)
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if(COMPONENT)
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message(STATUS "Install component: \"${COMPONENT}\"")
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set(CMAKE_INSTALL_COMPONENT "${COMPONENT}")
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else()
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set(CMAKE_INSTALL_COMPONENT)
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endif()
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endif()
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# Is this installation the result of a crosscompile?
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if(NOT DEFINED CMAKE_CROSSCOMPILING)
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set(CMAKE_CROSSCOMPILING "TRUE")
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endif()
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# Set path to fallback-tool for dependency-resolution.
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if(NOT DEFINED CMAKE_OBJDUMP)
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set(CMAKE_OBJDUMP "/home/claw/.espressif/tools/riscv32-esp-elf/esp-14.2.0_20241119/riscv32-esp-elf/bin/riscv32-esp-elf-objdump")
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endif()
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if(NOT CMAKE_INSTALL_LOCAL_ONLY)
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# Include the install script for the subdirectory.
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include("/home/claw/.openclaw/agents/wisp/workspace/cits-sniffer/build/esp-idf/esp_system/port/cmake_install.cmake")
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endif()
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string(REPLACE ";" "\n" CMAKE_INSTALL_MANIFEST_CONTENT
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"${CMAKE_INSTALL_MANIFEST_FILES}")
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if(CMAKE_INSTALL_LOCAL_ONLY)
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file(WRITE "/home/claw/.openclaw/agents/wisp/workspace/cits-sniffer/build/esp-idf/esp_system/install_local_manifest.txt"
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"${CMAKE_INSTALL_MANIFEST_CONTENT}")
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endif()
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@@ -0,0 +1,9 @@
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execute_process(COMMAND "${CC}" "-C" "-P" "-x" "c" "-E" "-I" "${CONFIG_DIR}" "-I" "${LD_DIR}" "${SOURCE}"
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RESULT_VARIABLE RET_CODE
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OUTPUT_VARIABLE PREPROCESSED_LINKER_SCRIPT
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ERROR_VARIABLE ERROR_VAR)
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if(RET_CODE AND NOT RET_CODE EQUAL 0)
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message(FATAL_ERROR "Can't generate ${TARGET}\nRET_CODE: ${RET_CODE}\nERROR_MESSAGE: ${ERROR_VAR}")
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endif()
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string(REPLACE "\\n" "\n" TEXT "${PREPROCESSED_LINKER_SCRIPT}")
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file(WRITE "${TARGET}" "${TEXT}")
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@@ -0,0 +1,96 @@
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/*
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* SPDX-FileCopyrightText: 2022 Espressif Systems (Shanghai) CO LTD
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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/**
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* ESP32-C5 Linker Script Memory Layout
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* This file describes the memory layout (memory blocks) by virtual memory addresses.
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* This linker script is passed through the C preprocessor to include configuration options.
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* Please use preprocessor features sparingly!
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* Restrict to simple macros with numeric values, and/or #if/#endif blocks.
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*/
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/*
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* Automatically generated file. DO NOT EDIT.
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* Espressif IoT Development Framework (ESP-IDF) 5.5.1 Configuration Header
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*/
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/* List of deprecated options */
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/*
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* SPDX-FileCopyrightText: 2021-2024 Espressif Systems (Shanghai) CO LTD
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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/* CPU instruction prefetch padding size for flash mmap scenario */
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/*
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* PMP region granularity size
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* Software may determine the PMP granularity by writing zero to pmp0cfg, then writing all ones
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* to pmpaddr0, then reading back pmpaddr0. If G is the index of the least-significant bit set,
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* the PMP granularity is 2^G+2 bytes.
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*/
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/* CPU instruction prefetch padding size for memory protection scenario */
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/* Memory alignment size for PMS */
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/* rtc timer data (s_rtc_timer_retain_mem, see esp_clk.c files). For rtc_timer_data_in_rtc_mem section. */
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/*
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* IDRAM0_2_SEG_SIZE_DEFAULT is used when page size is 64KB
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*/
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MEMORY
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{
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/**
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* All these values assume the flash cache is on, and have the blocks this uses subtracted from the length
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* of the various regions. The 'data access port' dram/drom regions map to the same iram/irom regions but
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* are connected to the data port of the CPU and eg allow byte-wise access.
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*/
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/* Flash mapped instruction data */
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irom_seg (RX) : org = 0x42000020, len = (0x10000 << 8) - 0x20
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/**
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* (0x20 offset above is a convenience for the app binary image generation.
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* Flash cache has 64KB pages. The .bin file which is flashed to the chip
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* has a 0x18 byte file header, and each segment has a 0x08 byte segment
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* header. Setting this offset makes it simple to meet the flash cache MMU's
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* constraint that (paddr % 64KB == vaddr % 64KB).)
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*/
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/**
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* Shared data RAM, excluding memory reserved for ROM bss/data/stack.
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* Enabling Bluetooth & Trace Memory features in menuconfig will decrease the amount of RAM available.
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*/
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sram_seg (RWX) : org = 0x40800000, len = 0x4084E5A0 - 0x40800000
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/* Flash mapped constant data */
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drom_seg (R) : org = 0x42000020, len = (0x10000 << 8) - 0x20
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/* (See irom_seg for meaning of 0x20 offset in the above.) */
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/**
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* lp ram memory (RWX). Persists over deep sleep. // TODO: IDF-5667
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*/
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lp_ram_seg(RW) : org = 0x50000000, len = 0x4000 - (0 + (24))
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/* We reduced the size of lp_ram_seg by RESERVE_RTC_MEM value.
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It reserves the amount of LP memory that we use for this memory segment.
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This segment is intended for keeping:
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- (lower addr) rtc timer data (s_rtc_timer_retain_mem, see esp_clk.c files).
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- (higher addr) bootloader rtc data (s_bootloader_retain_mem, when a Kconfig option is on).
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The aim of this is to keep data that will not be moved around and have a fixed address.
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*/
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lp_reserved_seg(RW) : org = 0x50000000 + 0x4000 - (0 + (24)), len = (0 + (24))
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/* PSRAM seg */
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extern_ram_seg(RWX) : org = 0x42000020, len = (0x10000 << 8) - 0x20
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}
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/* Heap ends at top of sram_seg */
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_heap_end = 0x40000000;
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_data_seg_org = ORIGIN(rtc_data_seg);
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/**
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* The lines below define location alias for .rtc.data section
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* C5 has no distinguished LP(RTC) fast and slow memory sections, instead, there is a unified LP_RAM section
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* Thus, the following region segments are not configurable like on other targets
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*/
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REGION_ALIAS("rtc_iram_seg", lp_ram_seg );
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REGION_ALIAS("rtc_data_seg", rtc_iram_seg );
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REGION_ALIAS("rtc_slow_seg", rtc_iram_seg );
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REGION_ALIAS("rtc_data_location", rtc_iram_seg );
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REGION_ALIAS("rtc_reserved_seg", lp_reserved_seg );
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REGION_ALIAS("default_code_seg", irom_seg);
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REGION_ALIAS("default_rodata_seg", drom_seg);
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/**
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* If rodata default segment is placed in `drom_seg`, then flash's first rodata section must
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* also be first in the segment.
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*/
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ASSERT(_flash_rodata_dummy_start == ORIGIN(default_rodata_seg),
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".flash_rodata_dummy section must be placed at the beginning of the rodata segment.")
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@@ -0,0 +1,482 @@
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/*
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* SPDX-FileCopyrightText: 2024 Espressif Systems (Shanghai) CO LTD
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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/*
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* SPDX-FileCopyrightText: 2021-2024 Espressif Systems (Shanghai) CO LTD
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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/*
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* Automatically generated file. DO NOT EDIT.
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* Espressif IoT Development Framework (ESP-IDF) 5.5.1 Configuration Header
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*/
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/* List of deprecated options */
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/* CPU instruction prefetch padding size for flash mmap scenario */
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/*
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* PMP region granularity size
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* Software may determine the PMP granularity by writing zero to pmp0cfg, then writing all ones
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* to pmpaddr0, then reading back pmpaddr0. If G is the index of the least-significant bit set,
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* the PMP granularity is 2^G+2 bytes.
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*/
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/* CPU instruction prefetch padding size for memory protection scenario */
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/* Memory alignment size for PMS */
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/* rtc timer data (s_rtc_timer_retain_mem, see esp_clk.c files). For rtc_timer_data_in_rtc_mem section. */
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/* Default entry point */
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ENTRY(call_start_cpu0);
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SECTIONS
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{
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/**
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* RTC fast memory holds RTC wake stub code,
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* including from any source file named rtc_wake_stub*.c
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*/
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.rtc.text :
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{
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/* Align the start of RTC code region as per PMP granularity
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* this ensures we do not overwrite the permissions for the previous
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* region (ULP mem) regardless of its end alignment
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*/
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. = ALIGN(128);
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_rtc_fast_start = ABSOLUTE(.);
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. = ALIGN(128);
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_rtc_text_start = ABSOLUTE(.);
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*(.rtc.entry.text)
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mapping[rtc_text]
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*rtc_wake_stub*.*(.text .text.*)
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*(.rtc_text_end_test)
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/* Align the end of RTC code region as per PMP granularity */
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. = ALIGN(128);
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_rtc_text_end = ABSOLUTE(.);
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} > lp_ram_seg
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/**
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* This section located in RTC FAST Memory area.
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* It holds data marked with RTC_FAST_ATTR attribute.
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* See the file "esp_attr.h" for more information.
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*/
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.rtc.force_fast :
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{
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. = ALIGN(4);
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_rtc_force_fast_start = ABSOLUTE(.);
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mapping[rtc_force_fast]
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*(.rtc.force_fast .rtc.force_fast.*)
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. = ALIGN(4);
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_rtc_force_fast_end = ABSOLUTE(.);
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} > lp_ram_seg
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/**
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* RTC data section holds RTC wake stub
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* data/rodata, including from any source file
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* named rtc_wake_stub*.c and the data marked with
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* RTC_DATA_ATTR, RTC_RODATA_ATTR attributes.
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*/
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.rtc.data :
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{
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_rtc_data_start = ABSOLUTE(.);
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mapping[rtc_data]
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*rtc_wake_stub*.*(.data .rodata .data.* .rodata.* .srodata.*)
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_rtc_data_end = ABSOLUTE(.);
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} > lp_ram_seg
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/* RTC bss, from any source file named rtc_wake_stub*.c */
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.rtc.bss (NOLOAD) :
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{
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_rtc_bss_start = ABSOLUTE(.);
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*rtc_wake_stub*.*(.bss .bss.* .sbss .sbss.*)
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*rtc_wake_stub*.*(COMMON)
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mapping[rtc_bss]
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_rtc_bss_end = ABSOLUTE(.);
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} > lp_ram_seg
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/**
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* This section holds data that should not be initialized at power up
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* and will be retained during deep sleep.
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* User data marked with RTC_NOINIT_ATTR will be placed
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* into this section. See the file "esp_attr.h" for more information.
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*/
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.rtc_noinit (NOLOAD):
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{
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. = ALIGN(4);
|
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_rtc_noinit_start = ABSOLUTE(.);
|
||||
*(.rtc_noinit .rtc_noinit.*)
|
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|
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. = ALIGN(4);
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_rtc_noinit_end = ABSOLUTE(.);
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} > lp_ram_seg
|
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/**
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* This section located in RTC SLOW Memory area.
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* It holds data marked with RTC_SLOW_ATTR attribute.
|
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* See the file "esp_attr.h" for more information.
|
||||
*/
|
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.rtc.force_slow :
|
||||
{
|
||||
|
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. = ALIGN(4);
|
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_rtc_force_slow_start = ABSOLUTE(.);
|
||||
*(.rtc.force_slow .rtc.force_slow.*)
|
||||
|
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. = ALIGN(4);
|
||||
_rtc_force_slow_end = ABSOLUTE(.);
|
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} > lp_ram_seg
|
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/**
|
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* This section holds RTC data that should have fixed addresses.
|
||||
* The data are not initialized at power-up and are retained during deep
|
||||
* sleep.
|
||||
*/
|
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.rtc_reserved (NOLOAD):
|
||||
{
|
||||
|
||||
. = ALIGN(4);
|
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_rtc_reserved_start = ABSOLUTE(.);
|
||||
/**
|
||||
* New data can only be added here to ensure existing data are not moved.
|
||||
* Because data have adhered to the end of the segment and code is relied
|
||||
* on it.
|
||||
* >> put new data here <<
|
||||
*/
|
||||
*(.rtc_timer_data_in_rtc_mem .rtc_timer_data_in_rtc_mem.*)
|
||||
KEEP(*(.bootloader_data_rtc_mem .bootloader_data_rtc_mem.*))
|
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_rtc_reserved_end = ABSOLUTE(.);
|
||||
} > rtc_reserved_seg
|
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_rtc_reserved_length = _rtc_reserved_end - _rtc_reserved_start;
|
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ASSERT((_rtc_reserved_length <= LENGTH(rtc_reserved_seg)),
|
||||
"RTC reserved segment data does not fit.")
|
||||
/* Get size of rtc slow data based on rtc_data_location alias */
|
||||
_rtc_slow_length = (ORIGIN(rtc_slow_seg) == ORIGIN(rtc_data_location))
|
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? (_rtc_force_slow_end - _rtc_data_start)
|
||||
: (_rtc_force_slow_end - _rtc_force_slow_start);
|
||||
_rtc_fast_length = (ORIGIN(rtc_slow_seg) == ORIGIN(rtc_data_location))
|
||||
? (_rtc_force_fast_end - _rtc_fast_start)
|
||||
: (_rtc_noinit_end - _rtc_fast_start);
|
||||
ASSERT((_rtc_slow_length <= LENGTH(rtc_slow_seg)),
|
||||
"RTC_SLOW segment data does not fit.")
|
||||
ASSERT((_rtc_fast_length <= LENGTH(rtc_data_seg)),
|
||||
"RTC_FAST segment data does not fit.")
|
||||
.iram0.text :
|
||||
{
|
||||
_iram_start = ABSOLUTE(.);
|
||||
/* Vectors go to start of IRAM */
|
||||
ASSERT(ABSOLUTE(.) % 0x100 == 0, "vector address must be 256 byte aligned");
|
||||
KEEP(*(.exception_vectors_table.text));
|
||||
KEEP(*(.exception_vectors.text));
|
||||
/* Code marked as running out of IRAM */
|
||||
_iram_text_start = ABSOLUTE(.);
|
||||
mapping[iram0_text]
|
||||
} > sram_seg
|
||||
/* Marks the end of IRAM code segment */
|
||||
.iram0.text_end (NOLOAD) :
|
||||
{
|
||||
/* Align the end of code region as per PMP region granularity */
|
||||
. = ALIGN(128);
|
||||
|
||||
. = ALIGN(4);
|
||||
_iram_text_end = ABSOLUTE(.);
|
||||
} > sram_seg
|
||||
.iram0.data :
|
||||
{
|
||||
|
||||
. = ALIGN(16);
|
||||
_iram_data_start = ABSOLUTE(.);
|
||||
mapping[iram0_data]
|
||||
_iram_data_end = ABSOLUTE(.);
|
||||
} > sram_seg
|
||||
.iram0.bss (NOLOAD) :
|
||||
{
|
||||
|
||||
. = ALIGN(16);
|
||||
_iram_bss_start = ABSOLUTE(.);
|
||||
mapping[iram0_bss]
|
||||
_iram_bss_end = ABSOLUTE(.);
|
||||
|
||||
. = ALIGN(16);
|
||||
_iram_end = ABSOLUTE(.);
|
||||
} > sram_seg
|
||||
/**
|
||||
* This section is required to skip .iram0.text area because sram_seg and
|
||||
* sram_seg reflect the same address space on different buses.
|
||||
*/
|
||||
.dram0.dummy (NOLOAD):
|
||||
{
|
||||
. = ORIGIN(sram_seg) + _iram_end - _iram_start;
|
||||
} > sram_seg
|
||||
.dram0.data :
|
||||
{
|
||||
_data_start = ABSOLUTE(.);
|
||||
*(.gnu.linkonce.d.*)
|
||||
*(.data1)
|
||||
__global_pointer$ = . + 0x800;
|
||||
*(.sdata)
|
||||
*(.sdata.*)
|
||||
*(.gnu.linkonce.s.*)
|
||||
*(.gnu.linkonce.s2.*)
|
||||
*(.jcr)
|
||||
mapping[dram0_data]
|
||||
_data_end = ABSOLUTE(.);
|
||||
} > sram_seg
|
||||
/**
|
||||
* This section holds data that should not be initialized at power up.
|
||||
* The section located in Internal SRAM memory region. The macro _NOINIT
|
||||
* can be used as attribute to place data into this section.
|
||||
* See the "esp_attr.h" file for more information.
|
||||
*/
|
||||
.noinit (NOLOAD):
|
||||
{
|
||||
|
||||
. = ALIGN(4);
|
||||
_noinit_start = ABSOLUTE(.);
|
||||
*(.noinit .noinit.*)
|
||||
|
||||
. = ALIGN(4);
|
||||
_noinit_end = ABSOLUTE(.);
|
||||
} > sram_seg
|
||||
/* Shared RAM */
|
||||
.dram0.bss (NOLOAD) :
|
||||
{
|
||||
|
||||
. = ALIGN(8);
|
||||
_bss_start = ABSOLUTE(.);
|
||||
/**
|
||||
* ldgen places all bss-related data to mapping[dram0_bss]
|
||||
* (See components/esp_system/app.lf).
|
||||
*/
|
||||
mapping[dram0_bss]
|
||||
|
||||
. = ALIGN(8);
|
||||
_bss_end = ABSOLUTE(.);
|
||||
} > sram_seg
|
||||
ASSERT(((_bss_end - ORIGIN(sram_seg)) <= LENGTH(sram_seg)), "DRAM segment data does not fit.")
|
||||
.flash.text :
|
||||
{
|
||||
_stext = .;
|
||||
/**
|
||||
* Mark the start of flash.text.
|
||||
* This can be used by the MMU driver to maintain the virtual address.
|
||||
*/
|
||||
_instruction_reserved_start = ABSOLUTE(.);
|
||||
_text_start = ABSOLUTE(.);
|
||||
mapping[flash_text]
|
||||
*(.stub)
|
||||
*(.gnu.linkonce.t.*)
|
||||
*(.gnu.warning)
|
||||
*(.irom0.text) /* catch stray ICACHE_RODATA_ATTR */
|
||||
/**
|
||||
* CPU will try to prefetch up to 16 bytes of of instructions.
|
||||
* This means that any configuration (e.g. MMU, PMS) must allow
|
||||
* safe access to up to 16 bytes after the last real instruction, add
|
||||
* dummy bytes to ensure this
|
||||
*/
|
||||
. += 16;
|
||||
_text_end = ABSOLUTE(.);
|
||||
/**
|
||||
* Mark the flash.text end.
|
||||
* This can be used for MMU driver to maintain virtual address.
|
||||
*/
|
||||
_instruction_reserved_end = ABSOLUTE(.);
|
||||
_etext = .;
|
||||
/**
|
||||
* Similar to _iram_start, this symbol goes here so it is
|
||||
* resolved by addr2line in preference to the first symbol in
|
||||
* the flash.text segment.
|
||||
*/
|
||||
_flash_cache_start = ABSOLUTE(0);
|
||||
} > default_code_seg
|
||||
/**
|
||||
* Dummy section represents the .flash.text section but in default_rodata_seg.
|
||||
* Thus, it must have its alignment and (at least) its size.
|
||||
*/
|
||||
.flash_rodata_dummy (NOLOAD):
|
||||
{
|
||||
_flash_rodata_dummy_start = .;
|
||||
. = ALIGN(ALIGNOF(.flash.text)) + SIZEOF(.flash.text);
|
||||
/* Add alignment of MMU page size + 0x20 bytes for the mapping header. */
|
||||
. = ALIGN(0x10000) + 0x20;
|
||||
} > default_rodata_seg
|
||||
.flash.appdesc : ALIGN(0x10)
|
||||
{
|
||||
/**
|
||||
* Mark flash.rodata start.
|
||||
* This can be used for mmu driver to maintain virtual address
|
||||
*/
|
||||
_rodata_reserved_start = ABSOLUTE(.);
|
||||
_rodata_start = ABSOLUTE(.);
|
||||
/* !DO NOT PUT ANYTHING BEFORE THIS! */
|
||||
/* Should be the first. App version info. */
|
||||
*(.rodata_desc .rodata_desc.*)
|
||||
/* Should be the second. Custom app version info. */
|
||||
*(.rodata_custom_desc .rodata_custom_desc.*)
|
||||
/**
|
||||
* Create an empty gap within this section. Thanks to this, the end of this
|
||||
* section will match .flash.rodata's begin address. Thus, both sections
|
||||
* will be merged when creating the final bin image.
|
||||
*/
|
||||
. = ALIGN(ALIGNOF(.flash.rodata));
|
||||
} > default_rodata_seg
|
||||
ASSERT((ADDR(.flash.rodata) == ADDR(.flash.appdesc) + SIZEOF(.flash.appdesc)), "The gap between .flash.appdesc and .flash.rodata must not exist to produce the final bin image.")
|
||||
.flash.rodata : ALIGN(0x10)
|
||||
{
|
||||
_flash_rodata_start = ABSOLUTE(.);
|
||||
mapping[flash_rodata]
|
||||
*(.irom1.text) /* catch stray ICACHE_RODATA_ATTR */
|
||||
*(.gnu.linkonce.r.*)
|
||||
*(.rodata1)
|
||||
*(.gcc_except_table .gcc_except_table.*)
|
||||
*(.gnu.linkonce.e.*)
|
||||
/**
|
||||
* C++ constructor tables.
|
||||
*
|
||||
* Excluding crtbegin.o/crtend.o since IDF doesn't use the toolchain crt.
|
||||
*
|
||||
* RISC-V gcc is configured with --enable-initfini-array so it emits
|
||||
* .init_array section instead. But the init_priority sections will be
|
||||
* sorted for iteration in ascending order during startup.
|
||||
* The rest of the init_array sections is sorted for iteration in descending
|
||||
* order during startup, however. Hence a different section is generated for
|
||||
* the init_priority functions which is iterated in ascending order during
|
||||
* startup. The corresponding code can be found in startup.c.
|
||||
*/
|
||||
|
||||
. = ALIGN(4);
|
||||
__init_priority_array_start = ABSOLUTE(.);
|
||||
KEEP (*(EXCLUDE_FILE (*crtend.* *crtbegin.*) .init_array.*))
|
||||
__init_priority_array_end = ABSOLUTE(.);
|
||||
|
||||
. = ALIGN(4);
|
||||
__init_array_start = ABSOLUTE(.);
|
||||
KEEP (*(EXCLUDE_FILE (*crtend.* *crtbegin.*) .init_array))
|
||||
__init_array_end = ABSOLUTE(.);
|
||||
/* Addresses of memory regions reserved via SOC_RESERVE_MEMORY_REGION() */
|
||||
|
||||
. = ALIGN(4);
|
||||
soc_reserved_memory_region_start = ABSOLUTE(.);
|
||||
KEEP (*(.reserved_memory_address))
|
||||
soc_reserved_memory_region_end = ABSOLUTE(.);
|
||||
/* System init functions registered via ESP_SYSTEM_INIT_FN */
|
||||
|
||||
. = ALIGN(4);
|
||||
_esp_system_init_fn_array_start = ABSOLUTE(.);
|
||||
KEEP (*(SORT_BY_INIT_PRIORITY(.esp_system_init_fn.*)))
|
||||
_esp_system_init_fn_array_end = ABSOLUTE(.);
|
||||
_rodata_end = ABSOLUTE(.);
|
||||
. = ALIGN(ALIGNOF(.flash.tdata));
|
||||
} > default_rodata_seg
|
||||
ASSERT((ADDR(.flash.tdata) == ADDR(.flash.rodata) + SIZEOF(.flash.rodata)), "The gap between .flash.rodata and .flash.tdata must not exist to produce the final bin image.")
|
||||
.flash.tdata :
|
||||
{
|
||||
_thread_local_data_start = ABSOLUTE(.);
|
||||
*(.tdata .tdata.* .gnu.linkonce.td.*)
|
||||
. = ALIGN(ALIGNOF(.flash.tbss));
|
||||
_thread_local_data_end = ABSOLUTE(.);
|
||||
} > default_rodata_seg
|
||||
ASSERT((ADDR(.flash.tbss) == ADDR(.flash.tdata) + SIZEOF(.flash.tdata)), "The gap between .flash.tdata and .flash.tbss must not exist to produce the final bin image.")
|
||||
.flash.tbss (NOLOAD) :
|
||||
{
|
||||
_thread_local_bss_start = ABSOLUTE(.);
|
||||
*(.tbss .tbss.* .gnu.linkonce.tb.*)
|
||||
*(.tcommon .tcommon.*)
|
||||
_thread_local_bss_end = ABSOLUTE(.);
|
||||
} > default_rodata_seg
|
||||
/**
|
||||
* This section contains all the rodata that is not used
|
||||
* at runtime, helping to avoid an increase in binary size.
|
||||
*/
|
||||
.flash.rodata_noload (NOLOAD) :
|
||||
{
|
||||
/**
|
||||
* This symbol marks the end of flash.rodata. It can be utilized by the MMU
|
||||
* driver to maintain the virtual address.
|
||||
* NOLOAD rodata may not be included in this section.
|
||||
*/
|
||||
_rodata_reserved_end = ADDR(.flash.tbss);
|
||||
mapping[rodata_noload]
|
||||
} > default_rodata_seg
|
||||
/* Marks the end of data, bss and possibly rodata */
|
||||
.dram0.heap_start (NOLOAD) :
|
||||
{
|
||||
|
||||
. = ALIGN(16);
|
||||
_heap_start = ABSOLUTE(.);
|
||||
} > sram_seg
|
||||
/* External RAM */
|
||||
/**
|
||||
* This section is required to skip flash sections, because `extern_ram_seg`
|
||||
* and `drom_seg` / `irom_seg` are on the same bus when app build use flash sections
|
||||
*/
|
||||
.ext_ram.dummy (NOLOAD):
|
||||
{
|
||||
. = ORIGIN(extern_ram_seg);
|
||||
. = . + (_rodata_reserved_end - _flash_rodata_dummy_start);
|
||||
. = ALIGN (0x10000);
|
||||
} > extern_ram_seg
|
||||
/**
|
||||
* This section is not included in the binary image; it is only present in the ELF file.
|
||||
* It is used to keep certain symbols in the ELF file.
|
||||
*/
|
||||
.noload 0 (INFO) :
|
||||
{
|
||||
_noload_keep_in_elf_start = ABSOLUTE(.);
|
||||
KEEP(*(.noload_keep_in_elf .noload_keep_in_elf.*))
|
||||
mapping[noload_keep_in_elf]
|
||||
_noload_keep_in_elf_end = ABSOLUTE(.);
|
||||
}
|
||||
/* DWARF 1 */
|
||||
.debug 0 : { *(.debug) }
|
||||
.line 0 : { *(.line) }
|
||||
/* GNU DWARF 1 extensions */
|
||||
.debug_srcinfo 0 : { *(.debug_srcinfo) }
|
||||
.debug_sfnames 0 : { *(.debug_sfnames) }
|
||||
/* DWARF 1.1 and DWARF 2 */
|
||||
.debug_aranges 0 : { *(.debug_aranges) }
|
||||
.debug_pubnames 0 : { *(.debug_pubnames) }
|
||||
/* DWARF 2 */
|
||||
.debug_info 0 : { *(.debug_info .gnu.linkonce.wi.*) }
|
||||
.debug_abbrev 0 : { *(.debug_abbrev) }
|
||||
.debug_line 0 : { *(.debug_line) }
|
||||
.debug_frame 0 : { *(.debug_frame) }
|
||||
.debug_str 0 : { *(.debug_str) }
|
||||
.debug_loc 0 : { *(.debug_loc) }
|
||||
.debug_macinfo 0 : { *(.debug_macinfo) }
|
||||
.debug_pubtypes 0 : { *(.debug_pubtypes) }
|
||||
/* DWARF 3 */
|
||||
.debug_ranges 0 : { *(.debug_ranges) }
|
||||
/* SGI/MIPS DWARF 2 extensions */
|
||||
.debug_weaknames 0 : { *(.debug_weaknames) }
|
||||
.debug_funcnames 0 : { *(.debug_funcnames) }
|
||||
.debug_typenames 0 : { *(.debug_typenames) }
|
||||
.debug_varnames 0 : { *(.debug_varnames) }
|
||||
/* GNU DWARF 2 extensions */
|
||||
.debug_gnu_pubnames 0 : { *(.debug_gnu_pubnames) }
|
||||
.debug_gnu_pubtypes 0 : { *(.debug_gnu_pubtypes) }
|
||||
/* DWARF 4 */
|
||||
.debug_types 0 : { *(.debug_types) }
|
||||
/* DWARF 5 */
|
||||
.debug_addr 0 : { *(.debug_addr) }
|
||||
.debug_line_str 0 : { *(.debug_line_str) }
|
||||
.debug_loclists 0 : { *(.debug_loclists) }
|
||||
.debug_macro 0 : { *(.debug_macro) }
|
||||
.debug_names 0 : { *(.debug_names) }
|
||||
.debug_rnglists 0 : { *(.debug_rnglists) }
|
||||
.debug_str_offsets 0 : { *(.debug_str_offsets) }
|
||||
.comment 0 : { *(.comment) }
|
||||
.note.GNU-stack 0: { *(.note.GNU-stack) }
|
||||
.riscv.attributes 0: { *(.riscv.attributes) }
|
||||
/DISCARD/ :
|
||||
{
|
||||
/**
|
||||
* Discarding .rela.* sections results in the following mapping:
|
||||
* .rela.text.* -> .text.*
|
||||
* .rela.data.* -> .data.*
|
||||
* And so forth...
|
||||
*/
|
||||
*(.rela.*)
|
||||
*(.got .got.plt) /* TODO: GCC-382 */
|
||||
*(.eh_frame_hdr)
|
||||
*(.eh_frame)
|
||||
}
|
||||
}
|
||||
ASSERT(((_iram_end - ORIGIN(sram_seg)) <= LENGTH(sram_seg)),
|
||||
"IRAM0 segment data does not fit.")
|
||||
ASSERT(((_heap_start - ORIGIN(sram_seg)) <= LENGTH(sram_seg)),
|
||||
"DRAM segment data does not fit.")
|
||||
@@ -0,0 +1,50 @@
|
||||
# Install script for directory: /home/claw/esp/esp-idf/components/esp_system/port
|
||||
|
||||
# Set the install prefix
|
||||
if(NOT DEFINED CMAKE_INSTALL_PREFIX)
|
||||
set(CMAKE_INSTALL_PREFIX "/usr/local")
|
||||
endif()
|
||||
string(REGEX REPLACE "/$" "" CMAKE_INSTALL_PREFIX "${CMAKE_INSTALL_PREFIX}")
|
||||
|
||||
# Set the install configuration name.
|
||||
if(NOT DEFINED CMAKE_INSTALL_CONFIG_NAME)
|
||||
if(BUILD_TYPE)
|
||||
string(REGEX REPLACE "^[^A-Za-z0-9_]+" ""
|
||||
CMAKE_INSTALL_CONFIG_NAME "${BUILD_TYPE}")
|
||||
else()
|
||||
set(CMAKE_INSTALL_CONFIG_NAME "")
|
||||
endif()
|
||||
message(STATUS "Install configuration: \"${CMAKE_INSTALL_CONFIG_NAME}\"")
|
||||
endif()
|
||||
|
||||
# Set the component getting installed.
|
||||
if(NOT CMAKE_INSTALL_COMPONENT)
|
||||
if(COMPONENT)
|
||||
message(STATUS "Install component: \"${COMPONENT}\"")
|
||||
set(CMAKE_INSTALL_COMPONENT "${COMPONENT}")
|
||||
else()
|
||||
set(CMAKE_INSTALL_COMPONENT)
|
||||
endif()
|
||||
endif()
|
||||
|
||||
# Is this installation the result of a crosscompile?
|
||||
if(NOT DEFINED CMAKE_CROSSCOMPILING)
|
||||
set(CMAKE_CROSSCOMPILING "TRUE")
|
||||
endif()
|
||||
|
||||
# Set path to fallback-tool for dependency-resolution.
|
||||
if(NOT DEFINED CMAKE_OBJDUMP)
|
||||
set(CMAKE_OBJDUMP "/home/claw/.espressif/tools/riscv32-esp-elf/esp-14.2.0_20241119/riscv32-esp-elf/bin/riscv32-esp-elf-objdump")
|
||||
endif()
|
||||
|
||||
if(NOT CMAKE_INSTALL_LOCAL_ONLY)
|
||||
# Include the install script for the subdirectory.
|
||||
include("/home/claw/.openclaw/agents/wisp/workspace/cits-sniffer/build/esp-idf/esp_system/port/soc/esp32c5/cmake_install.cmake")
|
||||
endif()
|
||||
|
||||
string(REPLACE ";" "\n" CMAKE_INSTALL_MANIFEST_CONTENT
|
||||
"${CMAKE_INSTALL_MANIFEST_FILES}")
|
||||
if(CMAKE_INSTALL_LOCAL_ONLY)
|
||||
file(WRITE "/home/claw/.openclaw/agents/wisp/workspace/cits-sniffer/build/esp-idf/esp_system/port/install_local_manifest.txt"
|
||||
"${CMAKE_INSTALL_MANIFEST_CONTENT}")
|
||||
endif()
|
||||
@@ -0,0 +1,45 @@
|
||||
# Install script for directory: /home/claw/esp/esp-idf/components/esp_system/port/soc/esp32c5
|
||||
|
||||
# Set the install prefix
|
||||
if(NOT DEFINED CMAKE_INSTALL_PREFIX)
|
||||
set(CMAKE_INSTALL_PREFIX "/usr/local")
|
||||
endif()
|
||||
string(REGEX REPLACE "/$" "" CMAKE_INSTALL_PREFIX "${CMAKE_INSTALL_PREFIX}")
|
||||
|
||||
# Set the install configuration name.
|
||||
if(NOT DEFINED CMAKE_INSTALL_CONFIG_NAME)
|
||||
if(BUILD_TYPE)
|
||||
string(REGEX REPLACE "^[^A-Za-z0-9_]+" ""
|
||||
CMAKE_INSTALL_CONFIG_NAME "${BUILD_TYPE}")
|
||||
else()
|
||||
set(CMAKE_INSTALL_CONFIG_NAME "")
|
||||
endif()
|
||||
message(STATUS "Install configuration: \"${CMAKE_INSTALL_CONFIG_NAME}\"")
|
||||
endif()
|
||||
|
||||
# Set the component getting installed.
|
||||
if(NOT CMAKE_INSTALL_COMPONENT)
|
||||
if(COMPONENT)
|
||||
message(STATUS "Install component: \"${COMPONENT}\"")
|
||||
set(CMAKE_INSTALL_COMPONENT "${COMPONENT}")
|
||||
else()
|
||||
set(CMAKE_INSTALL_COMPONENT)
|
||||
endif()
|
||||
endif()
|
||||
|
||||
# Is this installation the result of a crosscompile?
|
||||
if(NOT DEFINED CMAKE_CROSSCOMPILING)
|
||||
set(CMAKE_CROSSCOMPILING "TRUE")
|
||||
endif()
|
||||
|
||||
# Set path to fallback-tool for dependency-resolution.
|
||||
if(NOT DEFINED CMAKE_OBJDUMP)
|
||||
set(CMAKE_OBJDUMP "/home/claw/.espressif/tools/riscv32-esp-elf/esp-14.2.0_20241119/riscv32-esp-elf/bin/riscv32-esp-elf-objdump")
|
||||
endif()
|
||||
|
||||
string(REPLACE ";" "\n" CMAKE_INSTALL_MANIFEST_CONTENT
|
||||
"${CMAKE_INSTALL_MANIFEST_FILES}")
|
||||
if(CMAKE_INSTALL_LOCAL_ONLY)
|
||||
file(WRITE "/home/claw/.openclaw/agents/wisp/workspace/cits-sniffer/build/esp-idf/esp_system/port/soc/esp32c5/install_local_manifest.txt"
|
||||
"${CMAKE_INSTALL_MANIFEST_CONTENT}")
|
||||
endif()
|
||||
Reference in New Issue
Block a user